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David M. Russinoff

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Formal Verification of Floating-Point Hardware Design: A Mathematical Approach

by David M. Russinoff and J Strother Moore First published in 2018
3 editions

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Specification and verification of gate-level VHDL models of synchronous and asynchronous circuits

by David M. Russinoff First published in 1995
2 editions

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A formal language for the specification and verification of synchronous and asynchronous circuits

by David M. Russinoff First published in 1993
1 edition

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OLID: OL4865700A

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